1. Field of the Invention
The present invention relates to a data transmission system including a transmitter-side integrated circuit unit, a receiver-side integrated circuit unit, and transmission lines connected therebetween, and more particularly, to a receiver of the receiver-side integrated circuit unit.
2. Description of the Related Art
Generally, in a computer system, low voltage differential signaling (LVDS) data transmission systems have been used (see: JP-2001-357961 A, JP-2001-53598 A & JP-2002-135339 A).
A prior art data transmission system is constructed by a transmitter-side integrated circuit unit, a receiver-side integrated circuit unit, and first and second transmission lines connected therebetween (see: FIGS. 1 and 6 of JP-2001-53598 A). The transmitter-side integrated circuit unit is formed by a signal transmission circuit for transmitting an input signal generated in the transmitter-side internal circuit to the first and second transmission lines. On the other hand, a receiver of the receiver-side integrated circuit unit is formed by a signal reception circuit connected to the first and second transmission lines, a bias circuit for supplying a bias voltage to the signal reception circuit, and an output circuit for generating an output signal and transmitting it to the receiver-side internal circuit.
The signal transmission circuit is constructed by first and second inverters connected in series for receiving the input signal, an n-channel MOS transistor connected between the first transmission line and the ground terminal and whose gate is controlled by the output signal of the first inverter, and an n-channel MOS transistor connected between the second transmission line and the ground terminal and whose gate is controlled by the output signal of the second inverter.
When the input signal is at a high level, the first transmission line is in a high impedance (HZ) state and the second transmission line is at 0V. On the other hand, when the input signal is at a low level, the first transmission line is at 0V and the second transmission line is in an HZ state.
Thus, the signal transmission circuit generates LVDS signals in accordance with the input signal and transmits them to the first and second transmission lines, respectively.
On the other hand, in the receiver of the receiver-side integrated circuit unit, the signal reception circuit is constructed by a non-inverted amplification signal generating circuit connected to the first and second transmission lines for differentially amplifying the signals at the second and first transmission lines to generate a non-inverted amplification signal, an inverted amplification signal generating circuit connected to the first and second transmission lines for differentially amplifying the signals at the first and second transmission lines to generate an inverted amplification signal, and a constant current source circuit connected to the first and second transmission lines.
The elements of the non-inverted amplification signal generating circuit are symmetrical to those of the inverted amplification signal generating circuit.
The non-inverted amplification signal generating circuit is formed by first and second n-channel MOS transistors serving as amplifiers, and p-channel MOS transistors serving as a first current mirror circuit connected to the first and second n-channel MOS transistors. The bias voltage is applied to the gates of the first and second n-channel MOS transistors.
The inverted amplification signal generating circuit is formed by third and fourth n-channel MOS transistors serving as amplifiers and third and fourth p-channel MOS transistors as a second current mirror circuit connected to the third and fourth n-channel MOS transistors. The bias voltage is applied to the gates of the third and fourth n-channel MOS transistors.
The above-described prior art data transmission system will be explained later in detail.